Intel Erasure Decoder Reference Dhizaini

Yakagadziridzwa Intel® Quartus® Prime Design Suite: 17.0
ID: 683099
Shanduro: 2017.05.02
Nezve Erasure Decoder Reference Dhizaini
- Iyo Erasure Decoder ndiyo imwe mhando yeReed-Solomon decoder inoshandisa isiribinary, cyclic, linear block kukanganisa kodhi kodhi.
- MuReed-Solomon decoder ine erasure decoding capability, nhamba yezvikanganiso (E) uye erasures (E’) yaunogona kugadzirisa ndeiyi: n – k = 2E + E’
- Iko n ndiko kureba kweblock uye k ndiko kureba kwemeseji (n-k inoenzana nenhamba yezviratidzo zveparity).
- Iyo Erasure Decoder inongotarisa erasures, saka kugona kugadzirisa kunogona kusvika pakakwirira yakapihwa nan-k. Iyo decoder inogamuchira sekuisa nzvimbo dzekudzima, dzinowanzo kupihwa nedemodulator mukati meiyo coding system, iyo inogona kuratidza mamwe akagamuchirwa macode zviratidzo seasina kuvimbika. Iyo dhizaini haifanire kudarika erasure kugadzirisa kugona. Dhizaini inobata zviratidzo izvo zvinoratidza sekudzima sezero kukosha.
Features
- Targets Stratix® 10 zvishandiso
- Inogadzirisa zvakadzima
- Parallel operation
- Flow control
Erasure Decoder Inoshanda Tsananguro
- Iyo Erasure Decoder haigadzirise zvikanganiso, inodzima chete. Iyo inodzivirira kuoma kwekutsvaga nzvimbo dzekukanganisa, izvo zvinoda Reed-Solomon decoding.
- Iyo dhizaini algorithm uye zvivakwa zvakasiyana neReed-Solomon decoder. Erasure decoding imhando ye encoding. Inoedza kuzadza iyo inopinza ne p=n-k zviratidzo kuti igadzire codeword inoshanda, nekuzadzisa iwo equations. Iyo parity matrix uye jenareta matrix inotsanangura parity equations.
- Iyo dhizaini inoshanda chete nediki Reed-Solomon macode, akadai seRS(14,10), RS(16,12), RS(12,8) kana RS(10,6). Kune nhamba shoma yezviratidzo zveparity (p k-p), unofanira kushandisa jenareta matrix.
- Iyo erasure pateni (inomiririrwa ne-n-bits wide in_era input) inotarisa ROM uko dhizaini inochengeta parity submatrices. Dhizaini ine n p = n! k! n − k ! maitiro ekudzima anokwanisika. Naizvozvo, dhizaini inoshandisa kero yekumanikidza module.
- Dhizaini inoisa kero nenhamba yekero idiki pane kero uye ine chaiyo p bits set.
- Iyo Erasure Decoder inogamuchira pakupinza kwayo chero mwero wezviratidzo zvinopinda, kusvika kune yakazara block urefu n per cycle kune yakanyanya kubuditsa. Iwe unogona kugadzirisa parallelism uye nhamba yezviteshi, kuitira kuti dhizaini iwande zviratidzo zvinouya nenhamba yematanho anoenderana neakaenzana codewords anosvika panguva imwe chete.
- Iyo erasure decoder inogadzira iyo yakazara decoded codeword, kusanganisira cheki zviratidzo, mune imwe kutenderera (anoverengeka macodewords ematanho akati wandei).

Bhafa yekupinda inobvumidza iwe kuve nenhamba yezviratidzo zvakafanana pachiteshi zvishoma pane iyo yakazara block urefu (n). Intel inokurudzira kuti ushandise bandwidth yekupinza, kunze kwekunge kufanana kunoenderana nezvinodiwa zvekushandisa.
Erasure Decoder IP Core Parameters
| Parameter | Mitemo Yemitemo | Default Value | Tsanangudzo |
| Nhamba yematanho | 1 kusvika 16 | 1 | Huwandu hwematanho ekupinza (C) kugadzirisa. |
| Nhamba yebhiti pachiratidzo | 3 kusvika 12 | 4 | Nhamba yebhiti pachiratidzo (M). |
| Nhamba yezviratidzo per codeword | 1 kusvika 2M–1 | 14 | Nhamba yese yezviratidzo pacodeword (N). |
| Nhamba yecheki zviratidzo per codeword | 1 kusvika N–1 | 4 | Nhamba yecheki zviratidzo pa codeword (R). |
| Nhamba yezviratidzo zvakafanana pachiteshi | 1 kusvika N | 14 | Nhamba yezviratidzo zvinosvika zvakafanana pakuiswa kweshoko rega rega rekodhi (PAR) |
| Munda Polynomial | Chero inoshanda polynomial | 19 | Inotsanangura primitive polynomial inotsanangura munda weGalois. |
Erasure Decoder Interface uye Zviratidzo
- Iyo Avalon-ST interface inotsigira backpressure, inova nzira yekudzora kuyerera, uko kunyura kunogona kuratidza kune sosi kumisa kutumira data.
- Iyo yakagadzirira latency pane iyo Avalon-ST yekuisa interface ndeye 0; nhamba yezviratidzo pabhiti yakamisikidzwa ku1.
- Iyo wachi uye reset interfaces inotyaira kana kugamuchira wachi uye reset chiratidzo kuwiriranisa iyo Avalon-ST interfaces.
Avalon-ST Interfaces muDSP IP Cores
- Avalon-ST interfaces inotsanangura yakajairwa, inochinjika, uye modular protocol yekufambisa data kubva kune sosi interface kuenda kune sink interface.
- Iyo yekupinza interface ndeye Avalon-ST kunyura uye inobuda interface ndeye Avalon-ST sosi. Iyo Avalon-ST interface inotsigira kuchinjirwa kwepaketi nemapaketi akabatanidzwa mumatanho akawanda.
- Masaini eAvalon-ST anogona kutsanangura ma interfaces ekutamba echinyakare anotsigira asinKuyerera kwedata pasina ruzivo rwemigero kana miganhu yemapaketi. Ma interface akadaro anowanzo kuve nedata, masaini akagadzirira, uye anoshanda. Ma interface eAvalon-ST anogonawo kutsigira maprotocol akaomarara ekuputika uye kutamiswa kwemapaketi nemapaketi akapindirana mumachaneli akawanda. Iyo Avalon-ST interface inosanganisa magadzirirwo emachaneli akawanda, izvo zvinokutendera kuti uwane mashandisirwo anoshanda, ane nguva yakawanda pasina kushandisa complex control logic.
- Avalon-ST interfaces inotsigira backpressure, inova nzira yekudzora kuyerera uko singi inogona kuratidza kune sosi kuti irege kutumira data. Iyo sink inowanzo shandisa backpressure kumisa kuyerera kwedata kana mafifo ayo mabhafa azara kana kana aine congestion pakubuda kwayo.
Related Information
- Avalon Interface Specifications
Erasure Decoder IP Core Signals
Clock uye Reset Signals
| Zita | Avalon-ST Type | Direction | Tsanangudzo |
| clk_clk | clk | Input | Iyo huru system wachi. Iyo yese IP musimboti inoshanda pamucheto unokwira we clk_clk . |
| reset_reset_n | reset_n | Input | Chiratidzo chepasi chinoshanda chinogadzirisa hurongwa hwese kana chasimbiswa. Unogona kutaura chiratidzo ichi asynchronously.
Nekudaro, iwe unofanirwa kuita dessert iyo synchronous kune clk_clk chiratidzo. Kana iyo IP musimboti yapora kubva pakugadzirisa, ita shuwa kuti iyo data yainogamuchira izere pakiti. |
Avalon-ST Input uye Output Interface Signals
| Zita | Avalon-ST Type | Direction | Tsanangudzo |
| in_ready | ready | Output | Kuendesa data yakagadzirira chiratidzo kuratidza kuti singi yakagadzirira kugamuchira data. Iyo sink interface inotyaira in_ready siginecha yekudzora kuyerera kwedata pane iyo interface. Iyo sink interface inobata iyo data interface masaini pane yazvino clk inokwira kumucheto. |
| in_valid | valid | Input | Data inoshanda chiratidzo kuratidza chokwadi chezviratidzo zve data. Kana iwe uchiti in_valid chiratidzo, iyo Avalon-ST data interface masiginecha anoshanda. Paunobvisa in_valid siginecha, iyo Avalon-ST data interface masaini haashande uye anofanirwa kuregererwa. Unogona kutaura in_valid chiratidzo chero data ravepo. Nekudaro, sink inongotora iyo data kubva kunobva apo iyo IP musimboti inotaura in_ready chiratidzo. |
| mu_data[] | data | Input | Kuiswa kwedata rine zviratidzo zvecodeword. Inoshanda chete kana in_valid ichinzi. Iyo in_data siginecha ndeye vector ine C x PAR zviratidzo. Kana PAR < N, iyo codeword yechiteshi chega chega inosvika pamataundi akati wandei. |
| mu_nguva | data | Input | Kuiswa kwedata kunoratidza kuti ndezvipi zviratidzo zvinodzimwa. Inoshanda chete kana in_valid ichinzi. Ivector ine C x PAR bits. |
| out_ready | ready | Input | Kuendesa data yakagadzirira chiratidzo kuratidza kuti iyo yakadzika module yakagadzirira kugamuchira data. Iyo sosi inopa data nyowani (kana iripo) paunotaura iyo out_ready siginecha uye womira kupa data nyowani kana iwe uchibvisa iyo out_ready siginecha. |
| kunze_kunoshanda | valid | Output | Data inoshanda chiratidzo. Iyo IP musimboti inosimbisa iyo out_valid siginecha yakakwirira, pese painobuda inobuda iri kunze_data. |
| out_data | data | Output | Iine decoded inobuda kana iyo IP core inotaura out_valid chiratidzo. Zviratidzo zvakagadziriswa zviri muhurongwa humwe chete hwavanopinzwa. Ivector ine C x N zviratidzo. |
| kunze_kukanganisa | kukanganisa | Output | Inoratidza codeword isingagadzirike. |
- Chiratidzo chakanzi in_valid chinoratidza data chaiyo.
- Imwe neimwe codeword inogona kusvika pamusoro akati wandei, zvichienderana neparallelism parameter. Iyo dhizaini inoteedzera chimiro chekuisa, saka haidi miganhu yepakiti pane iyo interface. Iyo dhizaini Nhamba yezviteshi mune zvakafanana inowedzera throughput nekudzokorora mayuniti anoshanda kune ese machaneli anowirirana. Iyi dhizaini haishandise Avalon-ST interface yakawanda chiteshi rutsigiro.
- Kana iyo decoder ikataura iyo yekunze_valid chiratidzo, inopa iyo inoshanda data pane out_data.
- Iyo inoburitsa C codewords kutenderera, uko C ndiyo nhamba yematanho anoenderana. Iyo IP musimboti inotaura kunze_kukanganisa chiratidzo kana ichinge yagamuchira isina-yakagadziriswa codeword, kureva: kana iyo IP musimboti ichipfuura erasure kugadzirisa kugona.
Erasure Decoder Reference Dhizaini
Intel Corporation. Kodzero dzese dzakachengetwa. Intel, iyo Intel logo, uye mamwe maIntel mamaki zviratidzo zveIntel Corporation kana vatsigiri vayo. Intel inobvumidza kuita kwayo FPGA uye semiconductor zvigadzirwa kune zvazvino zvirevo zvinoenderana neIntel's standard waranti, asi inochengetera kodzero yekuita shanduko kune chero zvigadzirwa nemasevhisi chero nguva pasina chiziviso. Intel haitore mutoro kana mutoro unobva mukushandisa kana kushandiswa kwechero ruzivo, chigadzirwa, kana sevhisi inotsanangurwa pano kunze kwekunge yakabvumiranwa nekunyora neIntel. Vatengi veIntel vanorairwa kuti vawane yazvino vhezheni yezvakatemwa zvemudziyo vasati vavimba nechero ruzivo rwakaburitswa uye vasati vaisa maodha ezvigadzirwa kana masevhisi.
Mamwe mazita nemhando anogona kunzi zvinhu zvevamwe.
Zvinyorwa / Zvishandiso
![]() |
Intel Erasure Decoder Reference Dhizaini [pdf] Mirayiridzo Erasure Decoder Reference Dhizaini, Erasure Decoder, Erasure Decoder Reference |





